APOLLO is a new CPU, code compatible with the Motorola M68K and Motorola ColdFire processors.

It is a available and affordable CPU for your Amiga Classics and yet faster than the fastest 68060. It is compatible with all CPU of the Motorola 68000 family, except rare instructions currently not supported. AmigaOS 3.x currently recognize APOLLO CPU as a 68EC040. This new CPU is designed according to modern CPU standards, fully written in VHDL and is intended to run on the Altera Cyclone FPGAs.

  • Fast
  • Available
  • Affordable
  • Compatible
  • Fully Pipelined CPU
  • Fully Pipelined Double/Extended FPU
  • Super-Scalar
  • Executes up to 4 instructions per clock cycle
  • Two address calculation engines
  • Two integer execution engines
  • Market leading code density
  • Optimal cache utilization
  • Separate data and instruction caches, supporting concurrent fetch/read/write per clock cycle
  • Automatic memory prefetching
  • Memory stream detection
  • Store Buffer
  • Branch prediction

APOLLO CPU, when embedded on FPGA chips such as Cyclone 3 and Cyclone 5, is yet faster than the fastest 68060. This is possible because of the advanced design of the APOLLO Core, because of fast and big Instruction/Data Caches, and because of the very fast Read/Write Memory access.

Below are some benchmarks done with MiniBench tool between some Amiga Classic machines. All tests shows that the core is yet faster than a fast A1200 + 68060 @ 66Mhz - scores are all confirmed by SysInfo, SysSpeed and AIBB benchmarking tools.

System Accelerator CPU Frequence Performance MiniBench Points
Amiga 600 ACA620 68020 16 MHz 4 +
FPGA Arcade TG68-based 68020 n/c 9 ++
Amiga 1200 ACA1231 68030 41 MHz 11 +++
Amiga 1200 Blizzard1230 68030 50 MHz 11 +++
Amiga 4000 68040 25 MHz 13 +++
Amiga 4000 68040 40 MHz 25 ++++++
Amiga 1200 MK2 68060 66 MHz 65 ++++++++++++++++
Amiga 600 Vampire V2 SILVER2 x15 140 +++++++++++++++++++++++++++++++++++
Amiga 600 Vampire V2 SILVER6 x15 173 +++++++++++++++++++++++++++++++++++++++++++

The APOLLO CPU covers all the instructions and architecture designs of the classic MC680x0. It also brings some new features that makes it faster. The table below shows the architectural improvements between previous 680×0 CPUs and the new one.

Feature 68000 68020 68030 68040 68060 APOLLO
Extended EA-modes X X X X X
BitFields X X X X X
64Bit MUL X X X X
64Bit DIV X X X X
Instruction-Cache 256B 256B 4kB 8kB 16kB
Data-Cache 256B 4kB 8kB 32kB
Fully pipelined X X X
Super-Scalar X X
Store Buffer X X
Static Branch Prediction X X X
Dynamic Branch Prediction X X
Branch Target Cache X X
Conditional Rewrite X
Linkstack X
Instruction Bonding X
Instruction Fusing X
64-Bit Support X
3-opp instructions X
Memory-Prefetch X
Multimedia Extension X
Selfmodify Support X X
Integrated FPU X X Soon
Pipelined FPU Soon
Peak Inst/Cycle 0.25 0.5 0.5 1 2 4

All instructions from MC68000 to MC68060 are supported, except rare ones.

Not supported instruction Notes
TAS2 Very rare on AmigaOS
CAS2 / CHK2 / CMP2 Very rare on AmigaOS
Bitfields : Indirect Access EA Very rare, Speed compromise

The APOLLO core provides some Motorola ColdFire instructions.

Instruction M680x0 ColdFire APOLLO Description
MVS _ X X Move with Sign Extend (Same as MOVE + EXT).
MVZ _ X X Clear and then Move (Same as CLR + MOVE).

The instructions are very similar to the SSE / ALTIVEC version of them. APOLLO allows to use EA as 1 source and to update 3rd registers - so normally not overwrite source registers.

  • (ea) can be any Effective Address.
  • B is one of 16 Source Regs.
  • C is one of 16 Source Regs.
  • D is one of 16 Destination Regs.
Instruction Operands Description
PERM (ea),B,C,D Permute Bytes.
BSEL (ea),B,D Select Bytes.
POR (ea),B,D Parallel OR.
PAND (ea),B,D Parallel AND.
PANDN (ea),B,D Parallel ANDN.
PADD.B (ea),B,D Parallel ADD.B.
PADD.W (ea),B,D Parallel ADD.W.
PADDss.B (ea),B,D Parallel ADDss.B - Signed with Saturate.
PADDss.W (ea),B,D Parallel ADDss.W - Signed with Saturate.
PADDus.B (ea),B,D Parallel ADDus.B - Unsigned with Saturate.
PADDus.W (ea),B,D Parallel ADDus.W - Unsigned with Saturate.
PSUB.B (ea),B,D Parallel SUB.B.
PSUB.W (ea),B,D Parallel SUB.W.
PSUBss.B (ea),B,D Parallel SUBss.B - Signed with Saturate.
PSUBss.W (ea),B,D Parallel SUBss.W - Signed with Saturate.
PSUBus.B (ea),B,D Parallel SUBus.B - Unsigned with Saturate.
PSUBus.W (ea),B,D Parallel SUBus.W - Unsigned with Saturate.
PAVG.B (ea),B,D Parallel AVG.B.
PAVG.W (ea),B,D Parallel AVG.W.
PCMPeq.B (ea),B,D Parallel CMPeq.B - Equal.
PCMPeq.W (ea),B,D Parallel CMPeq.W - Equal.
PCMPgt.B (ea),B,D Parallel CMPgt.B - Greater Than.
PCMPgt.W (ea),B,D Parallel CMPgt.W - Greater Than.
PMULSH.W (ea),B,D Parallel MULSH.W.
PMULSL.W (ea),B,D Parallel MULSL.W.

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