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saga_core_ccc [2016/05/23 01:19]
flype [Name]
saga_core_ccc [2016/05/23 01:26] (current)
Line 1: Line 1:
-====== SAGA Clock-Cycle Register ====== +Deleted.
- +
-===== Overview ===== +
- +
-''​Clock-Cycle Register''​ is a new SAGA Read-Only registerIt is unique feature, never seen in other 68K existing system. It allows to get, in real-time, the number of cycles consumed by one or more instructions. This register can come in handy when programmer need to optimize his code and locate greedy routines. +
- +
-===== Name ===== +
- +
-  * ''​SAGA_CLOCK_COUNTER''​ +
- +
-===== Address ===== +
- +
-  * ''​0xDE0008''​ +
- +
-===== Access ===== +
- +
-  * ''​Read-Only''​ +
- +
-===== Size ===== +
- +
-  * ''​32-bits''​ +
- +
-===== Description ===== +
- +
-Each time register is read, the ''​internal counter''​ is reinitialized to 0. +
- +
-Can ''​overflow''​ if the delay between two calls is too long. +
- +
----- +
- +
-===== Example ===== +
- +
-  TEST: +
-    move.l #​$CAFECAFE,​d1 ; Operand for DIVU.L +
-    tst.l  $DE0008 ​      ; Reset the Clock-Cycle counter +
-    divu.l #​100,​d1 ​      ; Consume some CPU cycles +
-    move.l $DE0008,​d0 ​   ; D0 = Number of cycles consumed by the DIVU instruction. +
-    rts +
- +
----- +
- +
-===== Macros ===== +
- +
-  DEBUG EQU 1 +
-   +
-  SAGA_CLKCNT EQU $DE0008 +
-   +
-  CLKRESET MACRO +
-    IFNE DEBUG +
-    tst.l SAGA_CLKCNT +
-    ENDC +
-    ENDM +
-   +
-  CLKSAVE MACRO +
-    IFNE DEBUG +
-    move.l SAGA_CLKCNT,​__\1_time +
-    ENDC +
-  ENDM +
-   +
-  CLKADD MACRO +
-    IFNE DEBUG +
-    move.l d0,-(sp) +
-    move.l SAGA_CLKCNT,​d0 +
-    add.l  d0,​__\1_time +
-    move.l (sp)+,d0 +
-    ENDC +
-  ENDM +
- +
-  MyRoutine:​ +
-  +
-    CLKRESET +
-     +
-    ; Place here your routine +
-     +
-    CLKADD myCounter +
-     +
-    RTS +
- +
----- +
- +
-[[start|Home]] |  +
-[[links|Links]] |  +
-[[saga_core|SAGA]] |  +
  • saga_core_ccc.txt
  • Last modified: 2016/05/23 01:26
  • (external edit)