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saga:registers:saga_clock_counter [2019/12/10 02:06]
muaddib [SAGA_CLOCK_COUNTER Register]
saga:registers:saga_clock_counter [2020/08/02 12:37]
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-====== SAGA_CLOCK_COUNTER Register ====== 
  
-{{:​clockcycle.png?​nolink&​64|}} 
-===== Overview ===== 
- 
-''​Clock-Cycle Counter Register''​ is a new SAGA Read-Only register. It is unique feature, never seen in other 68K existing system. It allows to get, in real-time, the number of cycles consumed by one or more CPU instructions. This register can come in handy when programmer need to optimize his code and locate greedy routines. 
- 
----- 
- 
-===== Name ===== 
- 
-  * ''​SAGA_CLOCK_COUNTER''​ 
- 
-===== Address ===== 
- 
-  * ''​0xDE0008''​ 
- 
-===== Access ===== 
- 
-  * ''​Read-Only''​ 
- 
-===== Size ===== 
- 
-  * ''​32-bits''​ 
- 
----- 
- 
-===== Description ===== 
- 
-Each time register is read, the ''​internal counter''​ is reinitialized to 0. 
- 
-Can ''​overflow''​ if the delay between two calls is too long. 
- 
----- 
- 
-===== Example ===== 
- 
-  TEST: 
-    move.l #​$CAFECAFE,​d1 ; Operand for DIVU.L 
-    tst.l  $DE0008 ​      ; Reset the Clock-Cycle counter 
-    divu.l #​100,​d1 ​      ; Consume some CPU cycles 
-    move.l $DE0008,​d0 ​   ; D0 = Number of cycles consumed by the DIVU instruction. 
-    rts 
- 
----- 
- 
-===== Macros ===== 
- 
-  DEBUG EQU 1 
-  ​ 
-  SAGA_CLOCK_COUNTER EQU $DE0008 
-  ​ 
-  CLKCNT_RESET MACRO 
-    IFNE DEBUG 
-    tst.l SAGA_CLOCK_COUNTER 
-    ENDC 
-    ENDM 
-  ​ 
-  CLKCNT_SAVE MACRO 
-    IFNE DEBUG 
-    move.l SAGA_CLOCK_COUNTER,​__\1 
-    ENDC 
-  ENDM 
-  ​ 
-  CLKCNT_ADD MACRO 
-    IFNE DEBUG 
-    move.l d0,-(sp) 
-    move.l SAGA_CLOCK_COUNTER,​d0 
-    add.l  d0,__\1 
-    move.l (sp)+,d0 
-    ENDC 
-  ENDM 
- 
-  MyRoutine:  
-    move.l #​$CAFECAFE,​d1 ​   ; Operand for DIVU 
-    CLKCNT_RESET ​           ; Reset the Clock-Cycle counter 
-    divu.l #​100,​d1 ​         ; Consume some CPU cycles 
-    CLKCNT_SAVE MyCounter ​  ; Save the number of cycles in MyCounter 
-    RTS 
-  ​ 
-  MyCounter: DC.L 0 
- 
----- 
- 
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Last modified: le 2020/08/02 12:37